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_______________general description the max550b serial, 8-bit, voltage-output, digital-to- analog converter (dac) operates on a single +2.5v to +5.5v supply. its ?lsb tue specification is guaran- teed over temperature. operating current (supply cur- rent plus reference current) is typically 75? with v dd = 2.5v and less than 1? in shutdown mode. the refer- ence input is disconnected from the ref pin during shutdown. the serial interface operates at clock rates up to 10mhz and is compatible with 3-wire spi, qspi, and microwire interface standards. the max550b? ultra-low power consumption and small ?ax package make it ideal for portable and battery- powered applications. ________________________applications vcxo control comparator level settings gaas amp bias control digital gain and offset control ____________________________features ? +2.5v to +5.5v single-supply operation ? ?lsb (max) tue ? low 75? operating current (v dd = +2.5v) ? 1? shutdown mode ? ?ax package?0% smaller than 8-pin so ? 10mhz, 3-wire serial interface ? internal power-on reset clears all registers to zero max550b low-power, +2.5v to +5.5v, 8-bit voltage-output dac in ?ax ________________________________________________________________ maxim integrated products 1 v dd2 cs sclk din 1 2 8 7 v dd1 ref out gnd max550b dip/?ax top view 3 4 6 5 __________________pin configuration sclk din out ref 8 max550b gnd cs dac r-2r ladder v dd2 v dd1 dac register input shift register ________________functional diagram 19-1140; rev 0; 9/96 part MAX550BCpa MAX550BCua 0? to +70? 0? to +70? temp. range pin-package 8 plastic dip 8 ?ax _______________ordering information for free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800 max550bepa -40? to +85? 8 plastic dip spi and qspi are registered trademarks of motorola, inc. microwire is a registered trademark of national semiconductor corp. MAX550BC/d 0? to +70? dice* max550beua -40? to +85? 8 ?ax *dice are specified at t a = +25?, dc parameters only.
max550b low-power, +2.5v to +5.5v, 8-bit voltage-output dac in ?ax 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v dd1 = v dd2 = +2.5v to +5.5v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd1, v dd2 , sclk, d in , cs , out to gnd ...............-0.3v to +6v ref ...........................................................-0.3v to (v dd_ + 0.3v) maximum current (any pin) ...............................................50ma continuous power dissipation (t a = +70?) plastic dip (derate 9.1mw/? above +70?) ..............727mw ?ax (derate 4.1mw/? above +70?) ......................330mw operating temperature ranges max550bbc_a ...................................................0? to +70? max550bbe_a ................................................-40? to +85? storage temperature range .............................-65? to +150? lead temperature (soldering, 10sec) .............................+300? v in = 0v or v dd_ for specified performance dac code = 55 hex guaranteed monotonic t a = +25? dac code = 55 hex conditions pf 10 c in input capacitance (note 4) ? ? i in input current v 0.3v dd_ v il input low voltage v 0.7v dd_ v ih input high voltage k 32 r out dac output resistance v 0v ref dac output voltage swing ? 75 125 i ref reference input current (note 3) 160 275 k 32 r ref reference input resistance (note 2) ?.9 bits 8 n resolution v 2.5 v dd v ref reference input voltage lsb ? fse full-scale error lsb ?.9 dnl differential nonlinearity ? lsb ? tue total unadjusted error lsb ? zce zero-code error units min typ max symbol parameter max550bbc_a/max550bbe max550bbeua (note 1) max550bbc_a/max550bbe max550bbeua (note 1) v dd_ = v ref = 5.5v v dd_ = v ref = 2.5v static performance reference input dac output (out) digital inputs ( cs , sclk, din)
max550b low-power, +2.5v to +5.5v, 8-bit voltage-output dac in ?ax _______________________________________________________________________________________ 3 timing characteristics (note 5) (v dd1 = v dd2 = +2.5v to +5.5v, t a = t min to t max , unless otherwise noted. digital inputs switching from 0v to v dd_. ) electrical characteristics (continued) (v dd1 = v dd2 = +2.5v to +5.5v, t a = t min to t max , unless otherwise noted. typical values are at t a = +25?.) cs = high, all digital inputs from 0v to v dd_ v dd_ = 5.5v, output unloaded, all inputs = gnd or v dd_ output unloaded, all inputs = gnd or v dd to ?/2lsb, c l = 20pf c load = 20pf shutdown mode conditions ? 0.3 shutdown current nv-sec 50 digital feedthrough and crosstalk ? 0.3 10 i dd1 + i dd2 supply current v 2.5 5.5 v dd_ supply voltage range ? 4 voltage-output settling time v/? 1.4 voltage-output slew rate ? 4 wake-up time units min typ max symbol parameter conditions ? 5 v dd_ high to cs low ns 30 t ds din to sclk high setup ns 40 t cl ns 40 t ch sclk pulse width high sclk pulse width low ns 80 t cp sclk period ns 40 t csw cs pulse width high 10 0 din to sclk high hold ns 30 t css0 cs low to sclk high setup ns 30 t css1 cs high to sclk high setup t csh0 sclk high to cs low hold units min typ max symbol parameter note 1: 0? to -40? testing guaranteed by design using six sigma design limits. note 2: worst-case input resistance at ref occurs at dac code 55 hex. note 3: worst-case reference input current occurs at dac code 55 hex. note 4: guaranteed by design. not production tested. note 5: guaranteed by design. not production tested. power-on reset delay v dd_ = 2.5v v dd_ = 2.5v c l = 20pf 3.1 sr dynamic performance power supplies v dd_ = 2.5v v dd_ = 5.5v ns 10 t dh v dd_ = 5.5v ns 20 v dd_ = 5.5v ns 20 t csh1 delay, sclk high to cs high
max550b low-power, +2.5v to +5.5v, 8-bit voltage-output dac in ?ax 4 _______________________________________________________________________________________ __________________________________________typical operating characteristics (v dd1 = v dd2 = 2.5v, v ref = v dd_ , r l = 1m w , c l = 15pf, t a = +25?, unless otherwise noted.) -50 1k 10k 100k 1m 10m reference frequency response -40 10 0 max550b-01 frequency (hz) relative output (db) -20 -30 -10 dac code = ff hex v dd_ = 5v v ref = 2vp-p sine wave v dd_ = 2.5v v ref = 100mvp-p sine wave -60 -20 20 100 operating current vs. temperature 75.0 74.6 149.8 150.2 max550 toc-02 temperature (?) operating current ( m a) 60 149.4 75.4 v dd _ = v ref = 5.0v v dd _ = v ref = 2.5v -60 -20 20 100 shutdown current vs. temperature 36 32 28 160 200 240 max550 toc-03 temperature (?) operating current (na) 60 120 40 v dd _ = v ref = 5.0v v dd _ = v ref = 2.5v 0 -100 10 1m 100k 10k 1k 100 reference ac feedthrough vs. frequency -60 -80 max550 toc-04 frequency (hz) relative output (db) -40 -20 v ref = 1vp-p sine wave dac code = 00 hex
max550b low-power, +2.5v to +5.5v, 8-bit voltage-output dac in ?ax _______________________________________________________________________________________ 5 digital feedthrough sclk, 5v/div out, 50mv/div 200ns/div max550 toc-07 v ref = 2.5v negative settling time out, 1v/div 2 m s/div max550 toc-08 cs, 5v/div dac code ff hex to 00 hex v ref = 2.5v output glitch filtering out, 50mv/div, c l = 0pf out, 50mv/div, c l = 100pf out, 50mv/div, c l = 220pf 5 m s/div out, 50mv/div, c l = 1000pf max550 toc-05 cs, 5v/div code = 00 hex v dd_ = v ref = 2.5v positive settling time out, 1v/div 2 m s/div max550 toc-06 cs, 5v/div dac code 00 hex to ff hex v ref = 2.5v _____________________________typical operating characteristics (continued) (v dd1 = v dd2 = 2.5v, v ref = v dd_ , r l = 1m w , c l = 15pf, t a = +25?, unless otherwise noted.)
_______________detailed description analog section the max550b is an 8-bit, voltage-output digital-to-ana- log converter (dac). the dac consists of an r-2r lad- der network that converts 8-bit digital inputs into equivalent analog output voltages in proportion to the applied reference voltage (figure 1). the max550b? output is unbuffered and has a typical output resis- tance of 32k . the power-supply range is from +2.5v to +5.5v. reference input the voltage applied at ref sets the full-scale output for the dac and may range from 2.5v to v dd_ . the ref input resistance is code-dependent, with the lowest value (typically 32k ) occurring when the dac register is loaded with a code of 01010101 (55 hex). to mini- mize inl errors, the reference voltage source should have less than 6 output impedance. max550b low-power, +2.5v to +5.5v, 8-bit voltage-output dac in ?ax 6 _______________________________________________________________________________________ ______________________________________________________________pin description pin name function 1 gnd ground 2 out dac output voltage 3 cs chip-select input. a logic low on cs enables serial data to be clocked into the input shift register. programming commands are executed at cs ? rising edge. 4 din serial data input. data is clocked into the 16-bit input shift register on sclk? rising edge. 5 sclk serial clock input. data is clocked in on sclk? rising edge. 6 v dd2 connect to v dd1 7 ref external reference voltage input for dac (2.5v to v dd_ ) 8 v dd1 positive power supply (+2.5v to +5.5v) 2r r r r r 2r 2r 2r 2r 2r ref gnd dac register out msb lsb gnd 2r r r r 2r 2r 2r 2r figure 1. dac simplified circuit diagram note: switch positions shown for dac code ff hex.
max550b low-power, +2.5v to +5.5v, 8-bit voltage-output dac in ?ax _______________________________________________________________________________________ 7 max550b din sclk cs ub1 ub2 ub3 c2 c1 c0 ab1 ab2 d7 d6 d5 d4 d3 d2 d1 d0 optional pause instruction executed figure 2. serial-interface timing diagram dac output the max550b? output is unbuffered; it connects directly to the r-2r ladder. this configuration minimizes power consumption and reduces offset errors. for high- est accuracy, apply high resistive loads (1m and up). lower resistive loads can be driven, but output loading increases full-scale error. the magnitude of the expect- ed error is the ratio of the dac output resistance to the dc load resistance at the output. typically, an energy pulse is coupled into the dac output on the rising edge of cs . since the max550b? output is unbuffered (connected directly to the r-2r ladder), con- necting a small capacitor (200pf to 1000pf) from the out- put to ground creates a lowpass filter that effectively suppresses the pulse for sensitive applications (see output glitch filtering graph in the typical operating characteristics ). shutdown mode when the max550b is in shutdown mode, ref becomes high impedance. the supply current is unchanged, but the ref input current decreases to less than 1a. this allows the system reference to remain active with minimal power consumption. when exiting shutdown mode, the output recovery time is equivalent to the dac settling time. serial interface the max550b interface is compatible with 3-wire spi, qspi, and microwire microprocessor (?) interface standards. an active-low chip select ( cs ) enables the input shift register to receive data from the serial input, din (figure 2). data is clocked into the input shift register on rising edges of the serial clock signal (sclk). the clock frequency can be as high as 10mhz. when writing to the dac, transmit data msb first in one 16-bit word or two 8-bit bytes. the write cycle can be segmented when cs is kept active (low) to allow two 8- bit-wide transfers. after clocking all 16 bits into the input shift register, a rising edge on cs programs the dac. the dac output reflects the data stored in the dac register. figure 3 gives detailed timing infor- mation. initialization the max550b has an internal power-on reset. at power-up, all internal registers are reset to zero; there- fore, an initialization write is not necessary. serial input data format and control codes the control byte programs the dac (table 1). table 2 lists the max550b? serial-input command format. the 16-bit input word consists of an 8-bit control byte and an 8-bit data byte. the 8-bit control byte is not decoded internally; every control bit performs one function. data is clocked in starting with unassigned bit 1 (ub1), fol- lowed by the remaining control bits and the dac data byte. the lsb (d0) of the data byte is the last bit clocked into the input shift register (figure 2). table 3 is an example of a 16-bit word. it performs the following functions: 1) load 80 hex (128 decimal) into the dac register. 2) update the dac output on cs ? rising edge. table 4 shows how to calculate the output voltage based on the input code.
max550b low-power, +2.5v to +5.5v, 8-bit voltage-output dac in ?ax 8 _______________________________________________________________________________________ table 1. control-byte/input-word bit definitions x = don? care *clocked in first **clocked in last ub1* x unassigned bit 1 ub2 x unassigned bit 2 ub3 x unassigned bit 3 c2 0 power-up mode c2 1 power-down mode c1 0 dac register load operation disabled c1 1 dac register load operation enabled c0 0 dac output updated on rising edge of cs c0 1 unassigned operation ab1 0 assigned bit 1 ab2 1 assigned bit 2 d7 x dac data bit 7 (msb) d6 x dac data bit 6 d5 x dac data bit 5 d4 x dac data bit 4 d3 x dac data bit 3 d2 x dac data bit 2 d1 x dac data bit 1 data byte d0** x dac data bit 0 (lsb) microprocessor interfacing the max550b serial interface is compatible with microwire, spi, and qspi interface standards. for spi, clear the cpol and cpha bits (cpol = 0 and cpha = 0). cpol = 0 sets the idle clock state to zero and cpha = 0 changes data at sclk? falling edge. this setting allows spi to run at full clock speeds (1.5mhz). if a serial port is not available on your ?, three bits of a parallel port can be used to emulate a serial port by bit manipulation. minimize digital feedthrough at the dac output by operating the serial clock only when necessary. applications information power-supply and ground considerations connect gnd to the highest-quality ground available. bypass v dd with a 0.1? to 0.22? capacitor to gnd. the reference input can be used without bypassing. however, for optimum line/load-transient response and noise performance, bypass the reference input with a 0.1? to 4.7? capacitor to gnd. careful pc board layout minimizes crosstalk between the dac output, the reference, and the digital inputs. separate analog traces by running ground traces between them. make sure high-frequency digital lines are not routed parallel to analog lines. cs sclk din t ds t dh t cl t ch t css0 t csh0 t csw t csh1 t css1 figure 3. detailed serial-interface timing diagram control byte
max550b low-power, +2.5v to +5.5v, 8-bit voltage-output dac in ?ax _______________________________________________________________________________________ 9 x = don? care table 3. example input word table 4. analog output vs. code note: 1lsb = v ref x 2 -8 = v ref (1/256) analog output = +v ref (i/256), where i = integer value of digital input and wake up dac (if previously powered down) x = don? care table 2. serial-interface programming commands command control byte data byte loaded first loaded last ub1 ub2 ub3 c2 c1 c0 ab1 ab2 d7 d6 d5 d4 d3 d2 d1 d0 x on cs ? rising edge, wake up dac. dac register unchanged. x x x x x 1 x x x x x x x x x x unassigned command x x x 0 1 0 0 1 8-bit dac data on cs ? rising edge, load dac register. wake up dac (if previously powered down). x x x 1 0 0 0 1 x on cs ? rising edge, power down dac. dac output goes to zero. dac register unchanged. x x x 1 1 0 0 1 8-bit dac data on cs ? rising edge, power down dac and update dac register. dac output goes to zero. 1 0 0 0 0 x x x x x x x x x x x x x x x x x 0 0 0 0 0 0 1 1 0 0 1 0 x x x d0 d1 d2 d3 d4 d5 d6 d7 ab2 ab1 c0 c1 c2 ub3 ub2 ub1 loaded first loaded last 0 0 0 0 0 0 0 0 0 0 +v ref x (1/256) 1 0 0 0 0 0 0 0 +v ref x (127/256) 1 1 1 1 1 1 1 0 +v ref x (128/256) = +v ref /2 0 0 0 0 0 0 0 1 +v ref x (129/256) 1 0 0 0 0 0 0 1 +v ref x (255/256) 1 1 1 1 1 1 1 1 analog output (v) d0 d1 d2 d3 d4 d5 d6 d7 dac register contents
max550b low-power, +2.5v to +5.5v, 8-bit voltage-output dac in ?ax 10 ______________________________________________________________________________________ ac considerations digital feedthrough high-speed data at any of the digital input pins may couple through the dac? internal stray capacitance and cause noise (digital feedthrough) at the dac output, even though cs is held high. this digital feedthrough is tested by holding cs high and toggling the digital inputs from all 1s to all 0s. analog feedthrough due to internal stray capacitance, higher-frequency analog input signals at ref may couple to the output, even when the input digital code is all 0s. test analog feedthrough by setting the dac output to 0v and sweeping ref. ___________________chip information transistor count: 1562 ________________________________________________________package information dim a a1 a2 a3 b b1 c d1 e e1 e ea eb l min ? 0.015 0.125 0.055 0.016 0.045 0.008 0.005 0.300 0.240 0.100 0.300 ? 0.115 max 0.200 ? 0.175 0.080 0.022 0.065 0.012 0.080 0.325 0.310 ? ? 0.400 0.150 min ? 0.38 3.18 1.40 0.41 1.14 0.20 0.13 7.62 6.10 2.54 7.62 ? 2.92 max 5.08 ? 4.45 2.03 0.56 1.65 0.30 2.03 8.26 7.87 ? ? 10.16 3.81 inches millimeters plastic dip plastic dual-in-line package (0.300 in.) dim d d d d d d pkg. p p p p p n min 0.348 0.735 0.745 0.885 1.015 1.14 max 0.390 0.765 0.765 0.915 1.045 1.265 min 8.84 18.67 18.92 22.48 25.78 28.96 max 9.91 19.43 19.43 23.24 26.54 32.13 inches millimeters pins 8 14 16 18 20 24 c a a2 e1 d e ea eb a3 b1 b 0?- 15 a1 l d1 e 21-0043a
max550b low-power, +2.5v to +5.5v, 8-bit voltage-output dac in ?ax ______________________________________________________________________________________ 11 max550b l a c a1 b dim a a1 b c d e e h l a min 0.036 0.004 0.010 0.005 0.116 0.116 0.188 0.016 0 max 0.044 0.008 0.014 0.007 0.120 0.120 0.198 0.026 6 min 0.91 0.10 0.25 0.13 2.95 2.95 4.78 0.41 0 max 1.11 0.20 0.36 0.18 3.05 3.05 5.03 0.66 6 inches millimeters 8-pin m max micromax small-outline package 0.65 0.0256 a e e h d 0.101mm 0.004 in 21-0036d ___________________________________________package information (continued)
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 __________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 (408) 737-7600 1996 maxim integrated products printed usa is a registered trademark of maxim integrated products. max550b low-power, +2.5v to +5.5v, 8-bit voltage-output dac in ?ax notes

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